US Patent 9305624 Vertical switch three-dimensional memory array
Patent 9305624 was granted and assigned to HGST on April, 2016 by the United States Patent and Trademark Office.
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Patent abstract
A memory device includes a substrate, and, disposed thereover, an array of vertical memory switches. Each switch has at least three terminals and a cross-sectional area less than 6F2.
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Patent Citations Received
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Patent Inventor Names
Daniel R. Shepard0
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US Patent 09305624 Vertical switch three-dimensional memory array US Patent 9305624 Vertical switch three-dimensional memory array
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Patent Number
09305624
Patent Number
9305624
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US Patent 09305624 Vertical switch three-dimensional memory array
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Is a
Patent applicant
Current assignee
Patent jurisdiction
Patent number
09305624
Date of patent
April 5, 2016
Patent application number
14282444
Date Filed
May 20, 2014
Patent primary examiner
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