US Patent 9331016 SOC design with critical technology pitch alignment

An SOC apparatus includes a plurality of gate interconnects with a minimum pitch g, a plurality of metal interconnects with a minimum pitch m, and a plurality of vias interconnecting the gate interconnects and the metal interconnects. The vias have a minimum pitch v. The values m, g, and v are such that g2+m2≧v2 and an LCM of g and m is less than 20 g. The SOC apparatus may further include a second plurality of metal interconnects with a minimum pitch of m2, where m2>m and the LCM of g, m, and m2 is less than 20 g.