Patent attributes
A two-input multiplexer includes first, second, and third CMOS inverters, a transmission gate, and a tri-state inverter. The first CMOS inverter receives a select signal and outputs an inverted select signal. The second CMOS inverter receives a first input signal and outputs an inverted first input signal. The transmission gate receives the select signal, the inverted first input signal, and the inverted select signal, and outputs the inverted first input signal. The tri-state inverter receives the second input signal, the inverted select signal, and the select signal, and generates an inverted second input signal. The third CMOS inverter receives one of the inverted first and second input signals, and outputs one of the first and second input signals, respectively.
