US Patent 9368208 Non-volatile latch using magneto-electric and ferro-electric tunnel junctions

A non-volatile memory circuit includes an SRAM cell with magnetoelectric or ferroelectric structures for maintaining data within the SRAM cell even with power off. In some implementations, the magnetoelectric and ferroelectric structures can be programmed using a NOR or tristate gate coupled to an internal state of the SRAM cell. In other implementations, the magnetoelectric and ferroelectric structures can be configured as programmable resistors in the cross-coupled signal path of the SRAM inverters.