US Patent 9385001 Self-aligned ITO gate electrode for GaN HEMT device

A P-N junction gate high electron mobility transistor (HEMT) device with a self-aligned gate structure and a method for making the HEMT device is disclosed. In one embodiment, the HEMT device includes a heterojunction comprising a barrier layer formed on a channel layer. A gate layer is formed on the barrier layer, the gate layer comprising a P-type group III-V semiconductor material suitable for depleting the carriers of a current conducting channel at the heterojunction when the HEMT device is off. A gate electrode comprising indium tin oxide (ITO) is formed on the gate layer, the gate electrode and the gate layer having substantially the same length.