US Patent 9425785 Switching regulator with controllable slew rate

A driver circuit for driving a switching transistor having a control terminal responsive to a switching control signal includes a plurality of driver stages, each having a control input responsive to a respective driver control signal and an output coupled to the output of the other driver stages and to the control terminal of the switching transistor. At least one of the driver control signals has an on time that is delayed with respect to the other driver control signals. In an embodiment, at least two driver stages are on during a slew time interval.