US Patent 9425786 System and method for driving a power switch

A gate driver circuit for the power switch is disclosed. The gate driver circuit includes a resistor network coupled to the power switch. The resistor network includes a plurality of resistors and a control unit operatively coupled to the resistor network. The control unit detects an occurrence of a commutation phase and a saturation phase based on an identity of the power switch and corresponding time stamps associated with a start of a delay phase, the commutation phase, and the saturation phase. The control unit further controls the resistor network to provide different resistance values in at least two of a delay phase, a commutation phase, and a saturation phase when the power switch is transitioned to a first state. A method for driving the power switch is also disclosed.