Patent attributes
Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. A synchronous switch is interposed between the output and ground. The control switch and the synchronous switch comprise depletion-mode III-nitride transistors. In one embodiment, at least one of the control switch and the synchronous switches comprises a depletion-mode GaN HEMT. The buck converter further includes protection circuitry configured to disable current conduction through the control switch while the control circuitry is not powered up.
