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US Patent 9507593 Instruction for element offset calculation in a multi-dimensional array

Patent 9507593 was granted and assigned to Intel on November, 2016 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Current Assignee
Intel
Intel
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
9507593
Date of Patent
November 29, 2016
Patent Application Number
13976004
Date Filed
December 23, 2011
Patent Citations Received
‌
US Patent 11841792 Instructions with multiple memory access modes
0
Patent Primary Examiner
‌
Benjamin Geib
Patent abstract

An apparatus is described having functional unit logic circuitry. The functional unit logic circuitry has a first register to store a first input vector operand having an element for each dimension of a multi-dimensional data structure. Each element of the first vector operand specifying the size of its respective dimension. The functional unit has a second register to store a second input vector operand specifying coordinates of a particular segment of the multi-dimensional structure. The functional unit also has logic circuitry to calculate an address offset for the particular segment relative to an address of an origin segment of the multi-dimensional structure.

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