US Patent 9584130 Partial reconfiguration control interface for integrated circuits

Systems and methods are provided for coordinating the partial reconfiguration of a region of a configurable device (e.g., a SDM/CNoC/LSM system or device) through an interface that coordinates the stopping of the current persona in that region, the resetting of the new current persona, and the starting of the new persona in a manner that does not corrupt the memory of the affected region. The interface further provides signaling that the static region can use to protect itself during the partial reconfiguration, and disallows multiple partial reconfigurations of the same region at the same time.