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US Patent 9652284 GPU divergence barrier
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Patent
Date Filed
October 1, 2013
Date of Patent
May 16, 2017
Patent Application Number
14043562
Patent Citations Received
US Patent 11803934 Handling pipeline submissions across many compute units
US Patent 11768687 Scheduling of threads for execution utilizing load balancing of thread groups
US Patent 12086602 Scheduling of threads for execution utilizing load balancing of thread groups
0
US Patent 12073489 Handling pipeline submissions across many compute units
0
US Patent 11675597 Barrier-aware graphics cluster scheduling mechanism
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
9652284
Patent Primary Examiner
Emerson Puente
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