Patent attributes
An interconnection includes first and second conductive layers, first and second dielectric layers, a stop layer, and first and second adhesion layers is provided. The first conductive layer is disposed over a semiconductor substrate. The first dielectric layer is over the first conductive layer, and the first dielectric layer includes a via hole. The second dielectric layer is disposed over the first dielectric layer. The stop layer is located between the first dielectric layer and the second dielectric layer, and the second dielectric layer and the stop layer include a trench. The second conductive layer is located in the via hole and the trench to electrically connect with the first conductive layer. The first adhesion layer is located on sidewalls of the trench. The second adhesion layer is located between the second conductive layer and the first adhesion layer and between the second conductive layer and the first dielectric layer.
