Unfilled gaps are provided as spacers between gate stacks and electrically conductive source/drain contacts to reduce parasitic capacitance in CMOS structures. Sidewall spacers are removed partially or entirely from portions of the gate stacks and replaced by materials such as amorphous semiconductor materials. Source/drain contacts subsequently formed on source/drain regions adjoin the spacer replacement material. Selective removal of the spacer replacement material leaves unfilled gaps between the source/drain contacts and the gate stacks. The unfilled gaps are then sealed by a dielectric layer that leaves the gaps substantially unfilled.