US Patent 9716477 Bias control for stacked transistor configuration
Patent 9716477 was granted and assigned to PEREGRINE SEMICONDUCTOR CORP. on July, 2017 by the United States Patent and Trademark Office.
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Patent abstract
Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can be an envelope tracking amplifier. Circuital arrangements to generate reference gate-to-source voltages for biasing of the gates of the transistors of the stack are also presented. Particular biasing for a case of an input transistor of the stack is also presented.
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US Patent 09716477 Bias control for stacked transistor configuration US Patent 9716477 Bias control for stacked transistor configuration
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Patent Number
0971647700
Patent Number
971647700
Edits on 25 Mar, 2023
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Infobox
Is a
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
097164770
Date of Patent
July 25, 2017
0Patent Application Number
146268330
Date Filed
February 19, 2015
0Patent Primary Examiner
Edits on 24 Sep, 2022
Golden AI
Infobox
Is a
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
097164770
Date of Patent
July 25, 2017
0Patent Application Number
146268330
Date Filed
February 19, 2015
0Patent Primary Examiner
Edits on 14 Jan, 2022
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US Patent 09716477 Bias control for stacked transistor configuration
Infobox
Is a
Patent applicant
Current assignee
Patent jurisdiction
Patent number
09716477
Date of patent
July 25, 2017
Patent application number
14626833
Date Filed
February 19, 2015
Patent primary examiner
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