US Patent 9767240 Temperature-aware integrated circuit design methods and systems

Disclosed are temperature-aware integrated circuit (IC) design methods and systems, which establish a customized power delivery network (PDN) for an IC early in the design process in order to generate, in a timely manner, a final IC design layout that can be used to manufacture IC chips that will exhibit minimal hotspots. Specifically, prior to placement of library elements, an initial PDN is established and divided into sections. The library elements are placed. Then, potential hotspots associated with any of the sections are identified and a customized PDN for the IC is established to eliminate the hotspots. That is, for each section, a total power consumption amount is determined. When the total power consumption amount is greater than the threshold, a hotspot is indicated and the section is customized to eliminate the hotspot. Also disclosed is a resulting IC chip structure.