US Patent 9780082 Semiconductor device, layout system, and standard cell library

A semiconductor device includes a substrate, a first transistor gated by an inverted voltage level of a first input signal to pull up a first node, a second transistor gated by a voltage level of a second input signal to pull down the first node, a third transistor gated by an inverted voltage level of the second input signal to pull up the first node, a fourth transistor gated by a voltage level of the first input signal to pull down the first node, a fifth transistor gated by the voltage level of the second input signal to pull down a second node, a sixth transistor gated by the inverted voltage level of the first input signal to pull up the second node, a seventh transistor gated by the voltage level of the first input signal to pull down the second node, and an eighth transistor gated by the inverted voltage level of the second input signal to pull up the second node.