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US Patent 9812406 Microelectronic assemblies with cavities, and methods of fabrication
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Patent
Date Filed
September 29, 2016
Date of Patent
November 7, 2017
Patent Application Number
15280175
Patent Citations Received
US Patent 12015009 Stacked semiconductor die architecture with multiple layers of disaggregation
1
Patent Inventor Names
Hong Shen
2
Rajesh Katkar
2
Charles G. Woychik
2
Guilian Gao
2
Liang Wang
2
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
9812406
Patent Primary Examiner
Luan C Thai
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