US Patent 9825060 Semiconductor device
Patent 9825060 was granted and assigned to Japan Display on November, 2017 by the United States Patent and Trademark Office.
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A semiconductor device includes a first insulating layer having a first side wall, an oxide semiconductor layer located on the first side wall, a gate insulating layer located on the oxide semiconductor layer, the oxide semiconductor layer being located between the first side wall and the gate insulating layer, a gate electrode facing the oxide semiconductor layer located on the first side wall, the gate insulating layer being located between the oxide semiconductor layer and the gate electrode, a first electrode located below the oxide semiconductor layer and connected with one portion of the oxide semiconductor layer, and a second electrode located above the oxide semiconductor layer and connected with the other portion of the oxide semiconductor layer.
US Patent 09825060 Semiconductor device US Patent 9825060 Semiconductor device
US Patent 09825060 Semiconductor device
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