US Patent 9847132 Ternary content addressable memories

An example ternary content addressable memory. A bit cell of the memory may include first and second memristors, with a first terminal of the first memristor being connected to a first terminal of the second memristor via a node, a second terminal of the first memristor being switchably connected to a first data line, and a second terminal of the second memristor being switchably connected to a second data line. The bit cell may also include a match-line transistor that is connected between a first rail and a match line, with a gate of the match-line transistor being connected to the node.