US Patent 9847329 Structure of fin feature and method of making same

A semiconductor device includes a first fin feature embedded within an isolation structure disposed over a semiconductor substrate, the first fin structure having a first sidewall and a second opposing sidewall and a top surface extending from the first sidewall to the second sidewall. The device also includes a second fin feature disposed over the isolation structure and having a third sidewall and a fourth sidewall. The third sidewall is aligned with the first sidewall of the first fin structure. The device also includes a gate dielectric layer disposed directly on the top surface of the first fin structure, the third sidewall and the fourth sidewall of the second fin feature and a gate electrode disposed over the gate dielectric.