US Patent 9847411 Recessed field plate transistor structures

A transistor device including a field plate is described. One embodiment of such a device includes a field plate separated from a semiconductor layer by a thin spacer layer. In one embodiment, the thickness of spacer layer separating the field plate from the semiconductor layers is less than the thickness of spacer layer separating the field plate from the gate. In another embodiment, the non-zero distance separating the field plate from the semiconductor layers is about 1500 Å or less. Devices according to the present invention can show capacitances which are less drain bias dependent, resulting in improved linearity.