US Patent 9865544 Semiconductor device layout having a power rail

A semiconductor device is provided as follows. An active region extends along a first direction. A gate line overlaps the active region and extending along a second direction intersecting the first direction. A power rail has a main pattern extending along the first direction and a sub-pattern branching off from the main pattern to extend along the second direction. A first source/drain contact, electrically connected to the power rail, overlaps the active region and the sub-pattern.