US Patent 9900538 Phase delay counting analog-to-digital converter circuitry

An analog-to-digital converter may include an integrator, a gated ring oscillator, a coarse counter, a phase state register, a counter register, and logic circuitry. The gated ring oscillator may output a phase state signal continuously to the phase state register. The phase state signal includes multiple phase nodes, each of which is created by transmitting a signal through a number of delay stages. One of the phase nodes may be provided to the coarse counter. The phase state register and counter register may store the most current corresponding phase state and coarse counter outputs, respectively. A control signal corresponding to an analog image input signal may control the output of stored phase states and stored coarse counter outputs to the logic circuitry. The logic circuitry may generate a digital version of the analog image input signal based on the outputs of the phase state and counter registers.