Patent attributes
A synchronization method in a computer system with multiple cores, wherein a group of threads executes in parallel on a plurality of cores, the group of threads being synchronized using barrier synchronization in which each thread in the group waits for all the others at a barrier before progressing; the group of threads executes until a first thread reaches the barrier; the first thread enters a polling state, repeatedly checking for a release condition indicating the end of the barrier; subsequent threads to reach the barrier are moved to the core on which the first thread is executing; and other cores are powered down as the number of moved threads increases; and wherein when the first thread detects the release condition, the powered down cores are powered up and are available for use by the threads.
