Patent attributes
In a standby signal generation circuit, a first comparator compares a FB voltage fed back from a secondary side with a first reference voltage, and a second comparator compares a signal indicative of the magnitude of a load with a second reference voltage. When the FB voltage falls under the first reference voltage, the first comparator sets an RS flip-flop via a first delay circuit. At this time, if the signal is lower than the second reference voltage and a reset signal is not inputted to the RS flip-flop, it is determined, based on a standby control signal from the load, that an output voltage of a switching power supply apparatus has fallen. Accordingly, a standby signal indicative of standby mode is outputted via a second delay circuit. If the signal transiently exceeds the second reference voltage, the standby signal is set to normal mode.
