US Patent 9941350 Semiconductor device isolation via depleted coupling layer

A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate and having a first conductivity type, a body region disposed in the semiconductor substrate within the doped isolation barrier, having the first conductivity type, and in which a channel is formed during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate. The plurality of RESURF layers are arranged in a stack between the body region and the doped isolation barrier. The plurality of RESURF layers include an upper layer having a second conductivity type, a lower layer having the second conductivity type, and an isolation coupling layer disposed between the upper and lower layers, in contact with the doped isolation barrier, and having the first conductivity type.