Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hyoung Seub Rhie0
Date of Patent
September 10, 2024
0Patent Application Number
174701190
Date Filed
September 9, 2021
0Patent Citations
Patent Primary Examiner
Patent abstract
A three-dimensional integrated circuit non-volatile memory array includes a memory array of vertical channel NAND flash strings connected between a substrate source line and upper layer connection lines which each include n-type drain regions and p-type body line contact regions alternately disposed on each side of undoped or lightly doped string body regions so that each NAND flash string includes a vertical string body portion connected to a horizontal string body portion formed from the string body regions of the upper body connection lines.
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