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Walter Lindsay, Jr.

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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 7115484 Method of dicing a wafer
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US Patent 7125796 Plasma etch process for multilayer vias having an organic layer with vertical sidewalls
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US Patent 7132316 After deposition method of thinning film to reduce pinhole defects
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US Patent 7132340 Application of post-pattern resist trim for reducing pocket-shadowing in SRAMs
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US Patent 7135379 Isolation trench perimeter implant for threshold voltage control
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US Patent 7135406 Method for damascene formation using plug materials having varied etching rates
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US Patent 7138309 Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer
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US Patent 7141456 Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers
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US Patent 7141502 Slurry-less polishing for removal of excess interconnect material during fabrication of a silicon integrated circuit
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US Patent 7141514 Selective plasma re-oxidation process using pulsed RF source power
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US Patent 7144795 Method for forming a depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor
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US Patent 7151040 Methods for increasing photo alignment margins
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US Patent 7153740 Fabrication of lean-free stacked capacitors
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US Patent 7153744 Method of forming self-aligned poly for embedded flash
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US Patent 7157304 Single level metal memory cell using chalcogenide cladding
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US Patent 7157343 Method for fabricating semiconductor device
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US Patent 7157349 Method of manufacturing a semiconductor device with field isolation regions consisting of grooves filled with isolation material
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US Patent 7163879 Hard mask etch for gate polyetch
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US Patent 7166504 Semiconductor device manufacturing method
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US Patent 7169667 Nonvolatile memory cell with multiple floating gates formed after the select gate
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US Patent 7169682 Method for manufacturing semiconductor device
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US Patent 7169716 Photosensitive lacquer for providing a coating on a semiconductor substrate or a mask
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US Patent 7172958 High-frequency wiring structure and method for producing the same
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US Patent 7172959 Method for forming dual damascene interconnection in semiconductor device
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US Patent 7176041 PAA-based etchant, methods of using same, and resultant structures
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US Patent 7176072 Strained silicon devices transfer to glass for display applications
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US Patent 7179676 Manufacturing CCDs in a conventional CMOS process
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US Patent 7179702 Semiconductor device including metal insulator semiconductor field effect transistor and method of manufacturing the same
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US Patent 7179709 Method of fabricating non-volatile memory device having local SONOS gate structure
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US Patent 7179730 Semiconductor damascene trench and methods thereof
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US Patent 7179732 Interconnection structure and fabrication method thereof
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US Patent 7183140 Injection molded metal bonding tray for integrated circuit device fabrication
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US Patent 7183168 Method of manufacturing a semiconductor device having a silicide film
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US Patent 7183169 Method and arrangement for reducing source/drain resistance with epitaxial growth
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US Patent 7183196 Multilayer interconnection board and production method thereof
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US Patent 7183209 Semiconductor device and manufacturing method thereof
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US Patent 7183217 Dry-etching method
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US Patent 7186574 CMP process metrology test structures
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US Patent 7189619 Process for manufacturing vertically insulated structural components on SOI material of various thickness
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US Patent 7189620 Semiconductor device including a channel stop structure and method of manufacturing the same
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US Patent 7189627 Method to improve SRAM performance and stability
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US Patent 7192866 Source alternating MOCVD processes to deposit tungsten nitride thin films as barrier layers for MOCVD copper interconnects
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US Patent 7198654 Separator sheet and method for manufacturing electric double layer capacitor using the same
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US Patent 7198964 Method and apparatus for detecting faults using principal component analysis parameter groupings
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US Patent 7199045 Metal-filled openings for submicron devices and methods of manufacture thereof
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US Patent 7199062 Method for forming a resist film on a substrate having non-uniform topography
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US Patent 7202102 Doped absorption for enhanced responsivity for high speed photodiodes
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US Patent 7205219 Methods of forming integrated circuits devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate
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US Patent 7211496 Freestanding multiplayer IC wiring structure
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US Patent 7211880 Photoelectric conversion apparatus and manufacturing method of same
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US Patent 7214563 IC chip mounting method
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US Patent 7214628 Plasma gate oxidation process using pulsed RF source power
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US Patent 7217612 Manufacturing method for a semiconductor device with reduced local current
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US Patent 7217645 Method for manufacturing semiconductor device and electronic device and method for calculating connection condition
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US Patent 7220607 Method of manufacturing a semiconductor device
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US Patent 7220627 Method for manufacturing a semiconductor device where the scanning direction changes between regions during crystallization and process
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US Patent 7220640 Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same
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US Patent 7220642 Protection of active layers of memory cells during processing of other elements
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US Patent 7220647 Method of cleaning wafer and method of manufacturing gate structure
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US Patent 7220649 Method of manufacturing semiconductor device and the semiconductor device manufactured by the method
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US Patent 7220681 Semiconductor device and method of fabricating the same
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US Patent 7223627 Memory element and its method of formation
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US Patent 7223633 Method for solder crack deflection
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US Patent 7223660 Flash assisted annealing
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US Patent 7223661 Method of manufacturing semiconductor device
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US Patent 7224049 Method of fabricating lead frame and method of fabricating semiconductor device using the same, and lead frame and semiconductor device using the same
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US Patent 7226814 Semiconductor package device and method for fabricating the same
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US Patent 7229843 Device and method for monitoring process exhaust gas, semiconductor manufacturing device, and system and method for controlling semiconductor manufacturing device
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US Patent 7229847 Forming electrical contacts to a molecular layer
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US Patent 7229867 Process for producing a field-effect transistor and transistor thus obtained
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US Patent 7229876 Method of fabricating memory
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US Patent 7229883 Phase change memory device and method of manufacture thereof
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US Patent 7229914 Wiring layer structure for ferroelectric capacitor
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US Patent 7229917 Film formation method and apparatus for semiconductor process
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US Patent 7232737 Treatment of a removed layer of silicon-germanium
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US Patent 7232751 Semiconductor device and manufacturing method therefor
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US Patent 7232772 Substrate processing method
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US Patent 7235421 System and method for developing production nano-material
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US Patent 7235448 Dielectric layer forming method and devices formed therewith
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US Patent 7235468 FinFET device with reduced DIBL
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US Patent 7238540 Magnetic random access memory and method of manufacturing the same
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US Patent 7238568 Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same
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US Patent 7238606 Semiconductor devices and method for fabricating the same
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US Patent 7238617 Method for fabricating semiconductor device to minimize terminal effect in ECP process
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US Patent 7238628 Energy conversion and storage films and devices by physical vapor deposition of titanium and titanium oxides and sub-oxides
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US Patent 7241641 Attachment of integrated circuit structures and other substrates to substrates with vias
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US Patent 7241675 Attachment of integrated circuit structures and other substrates to substrates with vias
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US Patent 7241708 Laser irradiation method that includes moving a center of rotation along a straight line in order to enhance the crystallinity of the semiconductor film
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US Patent 7244633 Chip carrier substrate with a land grid array and external bond terminals
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US Patent 7244637 Chip on board and heat sink attachment methods
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US Patent 7247511 Thin film phase-change memory
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US Patent 7247563 Filling high aspect ratio openings by enhanced electrochemical deposition (ECD)
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US Patent 7249178 Non-intrusive recursive dispatching of nested service collections for aggregating web services
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US Patent 7253054 One time programmable EPROM for advanced CMOS technology
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US Patent 7253060 Gate-all-around type of semiconductor device and method of fabricating the same
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US Patent 7253110 Method and apparatus for forming a barrier metal layer in semiconductor devices
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US Patent 7253472 Method of fabricating semiconductor device employing selectivity poly deposition
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US Patent 7256072 Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device
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US Patent 7256094 Method for changing threshold voltage of device in resist asher
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US Patent 7256106 Method of dividing a substrate into a plurality of individual chip parts
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US Patent 7256125 Method of manufacturing a semiconductor device
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US Patent 7259057 Method for forming capacitor of semiconductor device
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US Patent 7259071 Semiconductor device with dual gate oxides
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US Patent 7259073 Semiconductor device and method of manufacturing the same
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US Patent 7259074 Trench isolation method in flash memory device
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US Patent 7261536 Injection molding device with outside air inlet part
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US Patent 7265015 Use of chlorine to fabricate trench dielectric in integrated circuits
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US Patent 7268005 Apparatus and method for stacking laser bars for uniform facet coating
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US Patent 7268068 Semiconductor device and manufacturing method thereof
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US Patent 7271050 Silicon nanocrystal capacitor and process for forming same
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US Patent 7276409 Method of forming a capacitor
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US Patent 7276411 Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same
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US Patent 7279407 Selective nickel plating of aluminum, copper, and tungsten structures
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US Patent 7282402 Method of making a dual strained channel semiconductor device
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US Patent 7282415 Method for making a semiconductor device with strain enhancement
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US Patent 7282422 Overlay key, method of manufacturing the same and method of measuring an overlay degree using the same
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US Patent 7282425 Structure and method of integrating compound and elemental semiconductors for high-performance CMOS
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US Patent 7285502 Methods for forming porous insulator structures on semiconductor devices
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US Patent 7291530 Semiconductor storage device and method of manufacturing the same
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US Patent 7306990 Information storage element, manufacturing method thereof, and memory array
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US Patent 7309637 Method to enhance device performance with selective stress relief
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US Patent 7312133 Method of manufacturing semiconductor device
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US Patent 7312152 Lactate-containing corrosion inhibitor
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US Patent 7314804 Plasma implantation of impurities in junction region recesses
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US Patent 7314830 Method of fabricating semiconductor integrated circuit device with 99.99 wt% cobalt
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US Patent 7316958 Masks for fabricating semiconductor devices and methods of forming mask patterns
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US Patent 7320943 Capacitor with hafnium, lanthanum and oxygen mixed dielectric and method for fabricating the same
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US Patent 7323389 Method of forming a FINFET structure
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US Patent 7326622 Method of manufacturing semiconductor MOS transistor device
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US Patent 7329898 Transition metal complex and light-emitting device
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US Patent 7332368 Light guide for image sensor
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US Patent 7332386 Methods of fabricating fin field transistors
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US Patent 7335521 Method for the production of multilayer discs
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US Patent 7335550 Methods for forming semiconductor devices including thermal processing
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US Patent 7335557 Semiconductor device of non-volatile memory
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US Patent 7338867 Semiconductor device having contact pads and method for manufacturing the same
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US Patent 7338869 Semiconductor device and its manufacturing method
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US Patent 7341906 Method of manufacturing sidewall spacers on a memory device, and device comprising same
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US Patent 7344906 Structure and method for releasing stressy metal films
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US Patent 7345350 Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias
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US Patent 7351599 High-powered light emitting device with improved thermal properties
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US Patent 7351602 Process for producing a thin film with MEMS probe circuits
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US Patent 7351637 Semiconductor transistors having reduced channel widths and methods of fabricating same
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US Patent 7354821 Methods of fabricating trench capacitors with insulating layer collars in undercut regions
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US Patent 7354871 Nanowires comprising metal nanodots and method for producing the same
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US Patent 7358101 Method for preparing an optical active layer with 1˜10 nm distributed silicon quantum dots
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US Patent 7358134 Split gate flash memory cell and manufacturing method thereof
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US Patent 7361518 Semiconductor element, semiconductor device, and method for fabrication thereof
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US Patent 7361546 Method of forming conductive stud on vertical memory device
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US Patent 7361576 Defect reduction of non-polar and semi-polar III-Nitrides with sidewall lateral epitaxial overgrowth (SLEO)
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US Patent 7364930 Method for producing micromechanical and micro-optic components consisting of glass-type materials
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US Patent 7365011 Catalytic nucleation monolayer for metal seed layers
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US Patent 7365027 ALD of amorphous lanthanide doped TiO
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US Patent 7368303 Method for temperature control in a rapid thermal processing system
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US Patent 7368372 Methods of fabricating multiple sets of field effect transistors
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US Patent 7368398 Substrate processing apparatus and substrate processing method
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US Patent 7368769 MOS transistor having a recessed gate electrode and fabrication method thereof
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US Patent 7371674 Nanostructure-based package interconnect
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US Patent 7371696 Carbon nanotube structure and method of vertically aligning carbon nanotubes
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US Patent 7372165 Method for making a semiconductor device having increased conductive material reliability
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US Patent 7375015 Manufacturing method which prevents abnormal gate oxidation
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US Patent 7378310 Method for manufacturing a memory device having a nanocrystal charge storage region
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US Patent 7378331 Methods of vertically stacking wafers using porous silicon
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US Patent 7381625 Deterministic process for constructing nanodevices
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US Patent 7381631 Use of expanding material oxides for nano-fabrication
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US Patent 7384800 Method of fabricating metal-insulator-metal (MIM) device with stable data retention
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US Patent 7384810 Image display device and method for manufacturing the same
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US Patent 7384879 Selection and deposition of nanoparticles using CO
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US Patent 7390684 Light emitting apparatus and method of manufacturing the same
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US Patent 7393715 Manufacturing method for image pickup apparatus
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US Patent 7393755 Dummy fill for integrated circuits
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US Patent 7393762 Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate
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US Patent 7399649 Semiconductor light-emitting device and fabrication method thereof
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US Patent 7402893 System and method for improved auto-boating
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US Patent 7402907 Semiconductor device and manufacturing method thereof
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US Patent 7405434 Quantum dot conjugates in a sub-micrometer fluidic channel
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US Patent 7407826 Vacuum packaged single crystal silicon device
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US Patent 7407828 CMOS image sensor and manufacturing method thereof
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US Patent 7413919 Method of manufacturing a structural health monitoring layer
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US Patent 7416910 Pyramid socket suspension
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US Patent 7417269 Magnetic impedance device, sensor apparatus using the same and method for manufacturing the same
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US Patent 7419887 Laser assisted nano deposition
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US Patent 7422914 Fabrication method of semiconductor integrated circuit device
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US Patent 7422916 Method of manufacturing thin film transistor panel
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US Patent 7422918 Method of making a support for light emitting diodes which are interconnected in a three-dimensional environment
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US Patent 7423286 Laser transfer article and method of making
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US Patent 7424515 System and method for deferring the delivery of an e-mail
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US Patent 7425491 Nanowire transistor with surrounding gate
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US Patent 7425499 Methods for forming interconnects in vias and microelectronic workpieces including such interconnects
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US Patent 7432175 Quantum dots nucleation layer of lattice mismatched epitaxy
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US Patent 7439086 Method for manufacturing liquid crystal display device
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US Patent 7439088 Liquid crystal display device and fabricating method thereof
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US Patent 7439092 Thin film splitting method
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US Patent 7442566 Liquid crystal display device and manufacturing method for the same
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US Patent 7442571 Semiconductor probe with resistive tip and method of fabricating the same, and information recording apparatus, information reproducing apparatus, and information measuring apparatus having the semiconductor probe
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US Patent 7445950 Image sensor and method of fabricating the same
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US Patent 7446053 Capacitor with nano-composite dielectric layer and method for fabricating the same
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US Patent 7449352 Mask and manufacturing method of a semiconductor device and a thin film transistor array panel using the mask
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US Patent 7449357 Method for fabricating image sensor using wafer back grinding
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US Patent 7452742 Solid-state imaging device, camera and method of producing the solid-state imaging device
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US Patent 7456038 Thin film transistor, integrated circuit, liquid crystal display, method of producing thin film transistor, and method of exposure using attenuated type mask
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US Patent 7456082 Method for producing silicon single crystal and silicon single crystal
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US Patent 7459334 Method of manufacturing quartz crystal vibrating piece
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US Patent 7460704 Device for stabilizing a workpiece during processing
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US Patent 7465590 Measurement of a sample using multiple models
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US Patent 7465594 Active-matrix addressing substrate and method of fabricating the same
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US Patent 7465596 Manufacturing method of semiconductor device
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US Patent 7465597 Method of manufacturing a diagnostic test strip
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US Patent 7521353 Method for reducing dielectric overetch when making contact to conductive features
Edits on 2 Dec, 2021
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Golden AI
edited on 2 Dec, 2021
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Patent primary examiner of
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US Patent 7521353 Method for reducing dielectric overetch when making contact to conductive features
Edits on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7465597 Method of manufacturing a diagnostic test strip
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7465596 Manufacturing method of semiconductor device
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7465594 Active-matrix addressing substrate and method of fabricating the same
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7465590 Measurement of a sample using multiple models
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7460704 Device for stabilizing a workpiece during processing
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7459334 Method of manufacturing quartz crystal vibrating piece
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7456082 Method for producing silicon single crystal and silicon single crystal
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Golden AI
edited on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7449357 Method for fabricating image sensor using wafer back grinding
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Golden AI
edited on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7446053 Capacitor with nano-composite dielectric layer and method for fabricating the same
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7445950 Image sensor and method of fabricating the same
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Golden AI
edited on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7442566 Liquid crystal display device and manufacturing method for the same
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7439092 Thin film splitting method
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7439088 Liquid crystal display device and fabricating method thereof
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Golden AI
edited on 1 Dec, 2021
Edits made to:
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Patent primary examiner of
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US Patent 7439086 Method for manufacturing liquid crystal display device

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