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Alexander Sofocleous

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Edits on 25 May, 2022
Владимир Серёгин profile picture
Владимир Серёгин
edited on 25 May, 2022
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Infobox (+1 properties)
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Nationality
Greece
Greece
Edits on 14 Dec, 2021
"Remove inverse infobox"
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Golden AI
edited on 14 Dec, 2021
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Infobox (-33 properties)
Infobox
Patent primary examiner of
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US Patent 7864627 Memory module decoder
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US Patent 7869275 Memory structure capable of bit-wise write or overwrite
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US Patent 7898850 Memory cells, electronic systems, methods of forming memory cells, and methods of programming memory cells
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US Patent 7903456 Superconducting circuit for high-speed lookup table
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US Patent 7903472 Operating method of non-volatile memory
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US Patent 7907469 Multi-port memory device for buffering between hosts and non-volatile memory devices
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US Patent 7911825 Multi-port memory based on DRAM core
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US Patent 7911837 Multi-state memory cell with asymmetric charge trapping
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US Patent 7916574 Circuit providing load isolation and memory domain translation for memory module
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US Patent 7957208 Flexible memory architectures for programmable logic devices
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US Patent 7965531 Memory module and memory device
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US Patent 7965547 Arrangement and method for controlling a micromechanical element
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US Patent 7965567 Phase adjustment apparatus and method for a memory device signaling system
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US Patent 7965578 Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module
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US Patent 7965579 Circuit providing load isolation and memory domain translation for memory module
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US Patent 7969762 Spintronic device with control by domain wall displacement induced by a current of spin-polarized carriers
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US Patent 7969765 Sense amplifier for semiconductor memory device
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US Patent 7969769 Multi-terminal chalcogenide logic circuits
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US Patent 7969771 Semiconductor device with thermally coupled phase change layers
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US Patent 7969772 Magnetic mechanical switch
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US Patent 7969773 Computer system with addressable storage medium
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US Patent 7969785 Low voltage non-volatile memory with charge trapping layer
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US Patent 7969788 Charge loss compensation methods and apparatus
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US Patent 7969793 Register configuration control device, register configuration control method, and program for implementing the method
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US Patent 7978506 Thin film logic device and system
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US Patent 7983068 Memory element with positive temperature coefficient layer
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US Patent 7983112 Semiconductor device which transmits or receives a signal to or from an external memory by a DDR system
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US Patent 7986546 Non-volatile shadow latch using a nanotube switch
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US Patent 7990787 Memory compiler redundancy
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US Patent 7995375 Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits
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US Patent 7995412 Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device
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US Patent 8000157 RAM macro and timing generating circuit thereof
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US Patent 8004887 Configurable digital and analog input/output interface in a memory device
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8004887 Configurable digital and analog input/output interface in a memory device
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8000157 RAM macro and timing generating circuit thereof
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Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7990787 Memory compiler redundancy
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7986546 Non-volatile shadow latch using a nanotube switch
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7983068 Memory element with positive temperature coefficient layer
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7978506 Thin film logic device and system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969788 Charge loss compensation methods and apparatus
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969785 Low voltage non-volatile memory with charge trapping layer
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969773 Computer system with addressable storage medium
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969772 Magnetic mechanical switch
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969771 Semiconductor device with thermally coupled phase change layers
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969769 Multi-terminal chalcogenide logic circuits
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7969765 Sense amplifier for semiconductor memory device
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021

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