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Gary Portka
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Edits on 15 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 15 Dec, 2021
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Patent primary examiner of
US Patent 7093047 Integrated circuit memory devices having clock signal arbitration circuits therein and methods of performing clock signal arbitration
US Patent 7093077 Method and apparatus for next-line prefetching from a predicted memory address
US Patent 7093100 Translation look aside buffer (TLB) with increased translational capacity for multi-threaded computer processes
US Patent 7096346 Microprocessor having instructions for exchanging values between two registers or two memory locations
US Patent 7100014 Memory stack architecture for reduced TLB misses
US Patent 7100016 Configuration management apparatus and method
US Patent 7103745 Two-level operating system architecture
US Patent 7103747 Memory table and memory manager for use in managing memory
US Patent 7107387 Control module comprising a ROM with reduced electrical consumption
US Patent 7111021 System and method for efficient space accounting in a file system with snapshots
US Patent 7111147 Location-independent RAID group virtual block management
US Patent 7111194 Mirror split brain avoidance
US Patent 7117276 Disk array device and method for controlling disk array device
US Patent 7117328 Non-volatile data storage system and data storaging method
US Patent 7120736 Storage unit and circuit for shaping communication signal
US Patent 7127586 Prefetching hints
US Patent 7130966 Power reduction for processor front-end by caching decoded instructions
US Patent 7133960 Logical to physical address mapping of chip selects
US Patent 7136801 Outboard data storage management system and method
US Patent 7136979 Copy engine and a method for data movement
US Patent 7143235 Proposed configuration management behaviors in a raid subsystem
US Patent 7143253 Remote copy system
US Patent 7146466 System for balancing multiple memory buffer sizes and method therefor
US Patent 7149867 System and method of enhancing efficiency and utilization of memory bandwidth in reconfigurable hardware
US Patent 7149891 Digital device configuration and method
US Patent 7150022 Systems and methods for the repartitioning of data
US Patent 7152148 Storage access keys
US Patent 7155591 Verifying the integrity of a media key block by storing validation data in the validation area of media
US Patent 7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
US Patent 7162577 Digital device configuration and method
US Patent 7162578 Digital device configuration and method
US Patent 7165139 Digital device configuration and method
US Patent 7165164 Method and apparatus including heuristic for sharing TLB entries
US Patent 7167960 Direct access storage system with combined block interface and file interface access
US Patent 7171513 Techniques for operating non-volatile memory systems with data sectors having different sizes than the sizes of the pages and/or blocks of the memory
US Patent 7174431 Mechanism for resolving ambiguous invalidates in a computer system
US Patent 7174441 Method and apparatus for providing internal table extensibility with external interface
US Patent 7184944 Apparatus and method for the simulation of a large main memory address space given limited resources
US Patent 7185152 Storage system, method of controlling storage system, and storage device
US Patent 7191285 Configuring memory for a RAID storage system
US Patent 7191297 Method for volume manager to have configurable device type and subtype for application use
US Patent 7191303 Storage controller
US Patent 7194495 Non-blocking memory management mechanism for supporting dynamic-sized data structures
US Patent 7194568 System and method for dynamic mirror-bank addressing
US Patent 7194593 Memory hub with integrated non-volatile memory
US Patent 7194597 Method and apparatus for sharing TLB entries
US Patent 7200719 Prefetch control in a data processing system
US Patent 7203084 Three-dimensional memory device with ECC circuitry
US Patent 7209983 Sequential flow-control and FIFO memory devices that are depth expandable in standard mode operation
US Patent 7210020 Continuous interleave burst access
US Patent 7216204 Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
US Patent 7216208 Storage controller
US Patent 7219187 Search parameter table in a content addressable memory
US Patent 7219200 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions
US Patent 7228544 Job processing method, job processing unit, and storage managing system
US Patent 7234039 Method, system, and apparatus for determining the physical memory address of an allocated and locked memory buffer
US Patent 7237058 Input data selection for content addressable memory
US Patent 7240160 Multiple-core processor with flexible cache directory scheme
US Patent 7243198 Method and system for transporting data content on a storage area network
US Patent 7243209 Apparatus and method for speeding up access time of a large register file with wrap capability
US Patent 7246132 Method of storing compressed data
US Patent 7246187 Method and apparatus for controlling exclusive access to a shared resource in a data storage system
US Patent 7246212 Memory device system and method for copying data in memory device system
US Patent 7249225 Method and apparatus for supporting read-only objects within an object-addressed memory hierarchy
US Patent 7249233 Method and apparatus for overwriting data in write-once recording medium
US Patent 7257675 Disk array device having snapshot simulation function
US Patent 7257679 Sharing monitored cache lines across multiple cores
US Patent 7266660 Protection of content stored on portable memory from unauthorized usage
US Patent 7269691 Electronic device for managing removable storage medium, method and storage medium therefor
US Patent 7269703 Data-migration method
US Patent 7269707 Multiple patches to on-chip ROM in a processor with a multilevel memory system without affecting performance
US Patent 7277987 Information processing apparatus, storage medium supporting device, and identifier changing method
US Patent 7281087 Disk array device managing cache memory by dividing cache memory into a plurality of cache segments
US Patent 7281095 Memory device control system
US Patent 7281107 Storage system, data migration managing system, and data migration managing method
US Patent 7284111 Integrated multidimensional sorter
US Patent 7287122 Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashing
US Patent 7290102 Point in time storage copy
US Patent 7293143 Efficient non-blocking k-compare-single-swap operation
US Patent 7296044 Method and apparatus for keeping track of memory usage for tasks in a shared heap
US Patent 7296130 Method and apparatus for providing hardware assistance for data access coverage on dynamically allocated data
US Patent 7296137 Memory management circuitry translation information retrieval during debugging
US Patent 7296167 Combined system responses in a chip multiprocessor
US Patent 7299324 Reactive placement controller for interfacing with banked memory storage
US Patent 7299327 Content-on-demand memory key with positive access evidence feature
US Patent 7305519 Error protection for associative memory entries and lookup operations performed thereon
US Patent 7310713 Storage system having dynamic volume allocation function
US Patent 7325099 Method and apparatus to enable DRAM to support low-latency access via vertical caching
US Patent 7325122 Facilitating inter-DSP data communications
US Patent 7337265 Organization of cache memory for hardware acceleration of the finite-difference time-domain method
US Patent 7337281 Storage system and data caching method in the system
US Patent 7337283 Method and system for managing storage reservation
US Patent 7340578 Method and apparatus for maintaining an accurate inventory of storage capacity in a clustered data processing system
US Patent 7343356 Systems and methods for storage modeling and costing
US Patent 7343453 Hierarchical systems and methods for providing a unified view of storage information
US Patent 7346751 Systems and methods for generating a storage-related metric
US Patent 7349382 Reverse path forwarding protection of packets using automated population of access control lists based on a forwarding information base
US Patent 7350035 Information-processing apparatus and electronic equipment using thereof
US Patent 7350050 Disk controller with logically partitioning function
US Patent 7353342 Shared lease instruction support for transient blocking synchronization
US Patent 7356665 Method and system for machine memory power and availability management in a processing system supporting multiple virtual machines
US Patent 7360035 Atomic read/write support in a multi-module memory configuration
US Patent 7360036 Data memory circuit
US Patent 7363434 Method, system, and computer-readable medium for updating memory devices in a multi-processor computer system
US Patent 7363445 Backup method
US Patent 7363460 Semiconductor memory device having tag block for reducing initialization time
US Patent 7366843 Computer system implementing synchronized broadcast using timestamps
US Patent 7366862 Method and apparatus for self-adjusting input delay in DDR-based memory systems
US Patent 7366863 Memory control apparatus, the program and method, and reproduction apparatus
US Patent 7370169 Efficient memory controller
US Patent 7373472 Storage switch asynchronous replication
US Patent 7376810 Integrated device with multiple reading and/or writing commands
US Patent 7380097 Apparatus and method for controlling address conversion buffer
US Patent 7386701 Prefetching hints
US Patent 7392364 Storage system having dynamic volume allocation function
US Patent 7392425 Mirror split brain avoidance
US Patent 7409497 System and method for efficiently guaranteeing data consistency to clients of a storage system cluster
US Patent 7426617 Method and system for synchronizing volumes in a continuous data protection system
US Patent RE40521 Data access and management system as well as a method for data access and data management for a computer system
US Patent 7603436 Data capture and fusion from a population of device users
US Patent 7631148 Adaptive file readahead based on multiple factors
US Patent 7644202 Disk array device and method for controlling disk array device
US Patent 7992214 Method for protecting memory proprietary commands
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7992214 Method for protecting memory proprietary commands
Edits on 3 Dec, 2021
Golden AI
edited on 3 Dec, 2021
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Patent primary examiner of
US Patent 7644202 Disk array device and method for controlling disk array device
Golden AI
edited on 3 Dec, 2021
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Patent primary examiner of
US Patent 7631148 Adaptive file readahead based on multiple factors
Golden AI
edited on 3 Dec, 2021
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Patent primary examiner of
US Patent 7603436 Data capture and fusion from a population of device users
Edits on 1 Dec, 2021
Golden AI
edited on 1 Dec, 2021
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Patent primary examiner of
US Patent RE40521 Data access and management system as well as a method for data access and data management for a computer system
Golden AI
edited on 1 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 7426617 Method and system for synchronizing volumes in a continuous data protection system
Edits on 1 Dec, 2021
Golden AI
edited on 1 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 7409497 System and method for efficiently guaranteeing data consistency to clients of a storage system cluster
Golden AI
edited on 30 Nov, 2021
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Patent primary examiner of
US Patent 7392425 Mirror split brain avoidance
Golden AI
edited on 30 Nov, 2021
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Patent primary examiner of
US Patent 7392364 Storage system having dynamic volume allocation function
Golden AI
edited on 30 Nov, 2021
Edits made to:
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Patent primary examiner of
US Patent 7386701 Prefetching hints
Edits on 30 Nov, 2021
Golden AI
edited on 30 Nov, 2021
Edits made to:
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Patent primary examiner of
US Patent 7380097 Apparatus and method for controlling address conversion buffer
Golden AI
edited on 29 Nov, 2021
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Patent primary examiner of
US Patent 7376810 Integrated device with multiple reading and/or writing commands
Edits on 26 Nov, 2021
Golden AI
edited on 26 Nov, 2021
Edits made to:
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Patent primary examiner of
US Patent 7373472 Storage switch asynchronous replication
Golden AI
edited on 26 Nov, 2021
Edits made to:
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Patent primary examiner of
US Patent 7370169 Efficient memory controller
Golden AI
edited on 26 Nov, 2021
Edits made to:
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Infobox
Patent primary examiner of
US Patent 7366863 Memory control apparatus, the program and method, and reproduction apparatus
Golden AI
edited on 26 Nov, 2021
Edits made to:
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+1
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Patent primary examiner of
US Patent 7366862 Method and apparatus for self-adjusting input delay in DDR-based memory systems
Golden AI
edited on 26 Nov, 2021
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+1
properties)
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Patent primary examiner of
US Patent 7366843 Computer system implementing synchronized broadcast using timestamps
Edits on 25 Nov, 2021
Golden AI
edited on 25 Nov, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7363460 Semiconductor memory device having tag block for reducing initialization time
Golden AI
edited on 25 Nov, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7363445 Backup method
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