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Tanh Q. Nguyen

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Edits on 14 Dec, 2021
"Remove inverse infobox"
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edited on 14 Dec, 2021
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Infobox (-96 properties)
Infobox
Patent primary examiner of
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US Patent 7096296 Supercharge message exchanger
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US Patent 7106567 Hard disk drive (HDD) electrical over voltage stress (EOS) systems and methods
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US Patent 7127530 Command issuing apparatus for high-speed serial interface
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US Patent 7130938 Method, system and program products for identifying communications adapters of a computing environment
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US Patent 7131020 Distributed copies of configuration information using token ring
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US Patent 7137011 Removable mother/daughter peripheral card
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US Patent 7149906 Communication device
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US Patent 7151298 Electrostatic discharge protection network having distributed components
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US Patent 7152125 Dynamic master/slave configuration for multiple expansion modules
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US Patent 7165130 Method and system for an adaptive multimode media queue
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US Patent 7165157 Method of performing active data copying processing, and storage subsystem and storage control apparatus for performing active data copying processing
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US Patent 7167929 Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays, and a storage-shelf-interface tunneling method and system
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US Patent 7174550 Sharing communications adapters across a plurality of input/output subsystem images
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US Patent 7177961 Managing access, by operating system images of a computing environment, of input/output resources of the computing environment
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US Patent 7185126 Universal serial bus hub with shared transaction translator memory
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US Patent 7188196 Method and apparatus for playing analog audio to multiple codec outputs
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US Patent 7191028 Electrically controlled apparatus
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US Patent 7191262 High-throughput UART interfaces
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US Patent 7203809 Data transfer control method, and peripheral circuit, data processor and processing system for the method
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US Patent 7236165 System and method for asynchronous storage and playback of a system state
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US Patent 7251702 Network controller and method of controlling transmitting and receiving buffers of the same
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US Patent 7254652 Autonomic configuration of port speeds of components connected to an interconnection cable
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US Patent 7260669 Semiconductor integrated circuits
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US Patent 7272670 Integrated multimedia system
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US Patent 7290068 Apparatus and method for writing information to a designated information storage medium with an allocated data storage device using a specified information recording
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US Patent 7299306 Dual numerically controlled delay logic for DQS gating
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US Patent 7299308 Data transmission apparatus and electronic control unit
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US Patent 7302505 Receiver multi-protocol interface and applications thereof
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US Patent 7313678 Installation procedure for wireless human interface device
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US Patent 7328285 Apparatus and method for writing information to a designated information storage medium with an allocated data storage device using a specified information recording format
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US Patent 7343431 Method, apparatus, and computer-readable medium for disabling BIOS-provided console redirection capabilities in the presence of an incompatible communications device
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US Patent 7349437 System and method for hardware based reassembly of a fragmented packet
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US Patent 7353306 Storage controller redundancy using bi-directional reflective memory channel
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US Patent 7353321 Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays
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US Patent 7363396 Supercharge message exchanger
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US Patent 11182259 Configuration rollback based on the failure to satisfy predefined conditions
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US Patent 11182323 Auto-switching communication interface
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US Patent 7370239 Input/output device with configuration, fault isolation and redundant fault assist functionality
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US Patent 7376021 Data output circuit and method in DDR synchronous semiconductor device
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US Patent 7380018 Peripheral bus transaction routing using primary and node ID routing information
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US Patent 7392297 Message processing scheme for realizing unified handling and management of messages using a portable message processing device
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US Patent 7403957 Image forming apparatus having control codes and rewrite control method for the same
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US Patent 7404021 Integrated input/output controller
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US Patent 7406090 Managing a buffer for media processing
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US Patent 7418532 Data transfer device, data transfer system, and data transfer method
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US Patent 7430623 System and method for buffering data received from a network
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US Patent 7444440 Method and device for providing high data rate for a serial peripheral interface
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US Patent 7447805 Buffer chip and method for controlling one or more memory arrangements
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US Patent 7447859 Method of performing active data copying processing, and storage subsystem and storage control apparatus for performing active data copying processing
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US Patent 7454544 Input/output interface and device abstraction
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US Patent 7457890 Integrated multimedia system
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US Patent 7457893 Method for dynamically selecting software buffers for aggregation according to current system characteristics
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US Patent 7467283 System and method for addressing protocol translation in a storage environment
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US Patent 7480742 Method for virtual adapter destruction on a physical adapter that supports virtual adapters
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US Patent 7484018 Universal serial bus hub with shared high speed handler implementing respective downstream transfer rates
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US Patent 7487270 Method and apparatus for using a personal digital assistant to interface with a communication station
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US Patent 7490180 Method, system, and computer program product for dynamically selecting software buffers for aggregation according to current system characteristics
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US Patent 7516345 Interface device for peripherals and priority control method thereof
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US Patent 11188137 Slave communication apparatus and master communication apparatus
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US Patent 11188485 Memory system and operating method thereof
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US Patent 7519747 Variable latency buffer and method of operation
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US Patent 7523230 Device and method for maximizing performance on a memory interface with a variable number of channels
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US Patent 7536483 Computer system having analog and digital video signal output functionality, and computer device and video signal transmitting device thereof
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US Patent 7536488 Buffer controller and management method thereof
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US Patent 7539793 Synchronized multichannel universal serial bus
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US Patent 7540017 Information processing apparatus for performing processing dependent on presence/absence of user, and method therefor
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US Patent 7543084 Method for destroying virtual resources in a logically partitioned data processing system
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US Patent 7546482 Method and apparatus for monitoring the storage of data in a computer system
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US Patent 7552247 Increased computer peripheral throughput by using data available withholding
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US Patent 7558127 Data output circuit and method in DDR synchronous semiconductor device
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US Patent 7563129 Video signal transmitting device for computer system having analog and digital video signal output functionality
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US Patent 7565460 Information processing apparatus and method for handling packet streams
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US Patent 7565462 Memory access engine having multi-level command structure
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US Patent 7577764 Method, system, and computer program product for virtual adapter destruction on a physical adapter that supports virtual adapters
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US Patent 7587717 Dynamic master/slave configuration for multiple expansion modules
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US Patent 7603487 Hardware configurable hub interface unit
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US Patent 7640367 Method for executing a software updating process and computer for implementing the method
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US Patent 7640370 Method and apparatus for controlling data transfer between EEPROM and a physical layer device
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US Patent 7660915 Input/output device with configuration, fault isolation and redundant fault assist functionality
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US Patent 7694031 Memory controller including a dual-mode memory interconnect
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US Patent 7694042 Instantaneous data-driven clock-gating device and hard-wired streaming processing system including the same
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US Patent 7694046 Remotely reprogrammable communications adapter for providing access to an electronic device
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US Patent 7725611 Method and apparatus for verifying data in a storage system
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US Patent 7739419 Data transfer control device and electronic instrument
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US Patent 7743185 Method, system, and computer program product for dynamically selecting software buffers for aggregation according to current system characteristics
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US Patent 7752281 Bridges performing remote reads and writes as uncacheable coherent operations
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US Patent 7761612 Migrating domains from one physical data processing system to another
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US Patent 7797468 Method and system for achieving fair command processing in storage systems that implement command-associated priority queuing
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US Patent 7822885 Channel-less multithreaded DMA controller
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US Patent 7865634 Managing a buffer for media processing
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US Patent 7870301 System and method for modification of virtual adapter resources in a logically partitioned data processing system
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US Patent 7890665 Migrating domains from one physical data processing system to another
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US Patent 7899946 Audio and USB multiplexing
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US Patent 7930445 Computer system using remote I/O and I/O data transfer method
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US Patent 7930451 Buffer controller and management method thereof
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US Patent 7934031 Reshuffled communications processes in pipelined asynchronous circuits
Edits on 7 Dec, 2021
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7934031 Reshuffled communications processes in pipelined asynchronous circuits
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7930445 Computer system using remote I/O and I/O data transfer method
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7930451 Buffer controller and management method thereof
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Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7899946 Audio and USB multiplexing
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Golden AI
edited on 6 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7890665 Migrating domains from one physical data processing system to another
Edits on 6 Dec, 2021
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Golden AI
edited on 6 Dec, 2021
Golden AI profile picture
Golden AI
edited on 6 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7865634 Managing a buffer for media processing
Golden AI profile picture
Golden AI
edited on 6 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7822885 Channel-less multithreaded DMA controller
Edits on 5 Dec, 2021
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Golden AI
edited on 5 Dec, 2021
Golden AI profile picture
Golden AI
edited on 5 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7761612 Migrating domains from one physical data processing system to another
Golden AI profile picture
Golden AI
edited on 5 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7752281 Bridges performing remote reads and writes as uncacheable coherent operations
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Edits on 4 Dec, 2021
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7739419 Data transfer control device and electronic instrument
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7725611 Method and apparatus for verifying data in a storage system
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Golden AI profile picture
Golden AI
edited on 4 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7694031 Memory controller including a dual-mode memory interconnect
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Golden AI
edited on 3 Dec, 2021
Edits on 3 Dec, 2021
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Golden AI
edited on 3 Dec, 2021

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