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US Patent 10037801 2T-1R architecture for resistive RAM
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Patent
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Date Filed
December 4, 2014
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Date of Patent
July 31, 2018
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Patent Application Number
15039784
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Patent Citations Received
US Patent 11963465 Non-volatile memory structure with positioned doping
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US Patent 10262747 Method to reduce program disturbs in non-volatile memory cells
US Patent 10622062 2T-1R architecture for resistive ram
US Patent 11568929 2T-1R architecture for resistive RAM
US Patent 10825515 Resistance variable memory device including stacked memory cells
US Patent 11018295 Non-volatile memory structure with positioned doping
US Patent 11062769 Resistance variable memory device including stacked memory cells
US Patent 11653580 Non-volatile memory structure with positioned doping
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US Patent 11908515 2T-1R architecture for resistive ram
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US Patent 10204691 Method to reduce program disturbs in non-volatile memory cells
Patent Inventor Names
Thomas Vogelsang
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Brent Steven Haukness
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Deepak Chandra Sekar
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Gary Bela Bronner
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Wayne Frederick Ellis
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10037801
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Patent Primary Examiner
Hoai V Ho
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