Patent attributes
A method of manufacturing a semiconductor structure is provided. Spacers on sidewalls of mandrels in a bipolar junction transistor (BJT) region, fins and source/drain structures in a field effect transistor (FET) region, and sacrificial gate structures in the BJT and FET regions are formed on a substrate. Functional gate structures are formed to replace the sacrificial gate structures in the FET region. After replacing the sacrificial gate structures in the FET region, first III-V semiconductor patterns are formed on the sidewalls of the mandrels to replace the spacers in the BJT region. Second III-V semiconductor patterns are formed on sidewalls and tops of the first III-V semiconductor patterns and between the sacrificial gate structures. Then, base contacts are formed to replace the sacrificial gate structures in the BJT region. The semiconductor structure manufactured having FinFET and BJT is also provided.
