Patent attributes
A CDR circuit includes a data-determination-circuit to determine a value of a data-signal, based on a first comparison-result of comparing the data-signal with first threshold-values at a timing of a clock-signal, a comparison-circuit to compare the data-signal with a second threshold-value at the timing to generate a second comparison-result, a phase-detection-circuit to detect data-patterns in which first to third symbols are temporally consecutive, based on a determination-result, the data-patterns forming that a value of the second symbol is larger than the first symbol and smaller than the third symbol, or the in value of the second symbol is smaller than the first symbol and larger than the third symbol, wherein the phase-detection-circuit generates a phase-difference-signal for controlling a phase of the clock-signal to advance or delay, based on the second comparison-result at the second symbol, and a phase-adjustment-circuit to adjust the phase of the clock-signal based on the phase-difference-signal.
