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US Patent 10109637 Cross couple structure for vertical transistors

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
December 28, 2017
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Date of Patent
October 23, 2018
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Patent Application Number
15856205
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Patent Citations Received
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US Patent 12114474 Integrated memory comprising secondary access devices between digit lines and primary access devices
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US Patent 10679992 Integrated device with vertical field-effect transistors and hybrid channels
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US Patent 10734372 Vertical transport static random-access memory cells with transistors of active regions arranged in linear rows
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US Patent 10770388 Transistor with recessed cross couple for gate contact over active region integration
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US Patent 11004856 Stacked vertical transistor memory cell with epi connections
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US Patent 11349001 Replacement gate cross-couple for static random-access memory scaling
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US Patent 12009422 Self aligned top contact for vertical transistor
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Patent Inventor Names
Bipul C. Paul
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Hui Zang
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Randy W. Mann
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10109637
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Patent Primary Examiner
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Mohammed Shamsuzzaman
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