US Patent 10157962 Resistive random access memory

A resistive random access memory is provided. The resistive memory cell includes a substrate, a transistor on the substrate, a bottom electrode on the substrate and electrically connected to the transistor source/drain, several top electrodes on the bottom electrode, several resistance-switching layers between the top and bottom electrode, and several current limiting layers between the resistance-switching layer and top electrodes. The cell could improve the difficulty on recognizing 1/0 signal by current at high temperature environment and save the area on the substrate by generating several conductive filaments at one transistor location.