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Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Yu-Ming Lin0
Han-Jong Chia0
Sai-Hooi Yeong0
Meng-Han Lin0
Chih-Yu Chang0
Date of Patent
May 21, 2024
0Patent Application Number
183439120
Date Filed
June 29, 2023
0Patent Citations
Patent Primary Examiner
Patent abstract
Memory devices and methods of forming the memory devices are disclosed herein. The memory devices include a resistive memory array including a first resistive memory cell, a staircase contact structure adjacent the resistive memory array, and an inter-metal dielectric layer over the staircase contact structure. The memory devices further include a first diode and a second diode over the inter-metal dielectric layer. The memory devices further include a first conductive via electrically coupling the first diode to a first resistor of the first resistive memory cell and a second conductive via electrically coupling the second diode to a second resistor of the first resistive memory cell.
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