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US Patent 10192779 Bulk substrates with a self-aligned buried polycrystalline layer

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
March 26, 2018
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Date of Patent
January 29, 2019
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Patent Application Number
15935606
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Patent Citations Received
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US Patent 12027580 Semiconductor on insulator wafer with cavity structures
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US Patent 11515397 III-V compound semiconductor layer stacks with electrical isolation provided by a trap-rich layer
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US Patent 11380759 Transistor with embedded isolation layer in bulk substrate
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US Patent 11411087 Integrated circuit (IC) structure with high impedance semiconductor material between substrate and transistor
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US Patent 11437522 Field-effect transistors with a polycrystalline body in a shallow trench isolation region
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US Patent 11862511 Field-effect transistors with a crystalline body embedded in a trench isolation region
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US Patent 11881506 Gate structures with air gap isolation features
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US Patent 12002878 Implanted isolation for device integration on a common substrate
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US Patent 11488980 Wafer with localized semiconductor on insulator regions with cavity structures
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US Patent 11545577 Semiconductor structure with in-device high resistivity polycrystalline semiconductor element and method
•••
Patent Inventor Names
Steven M. Shank
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Anthony K. Stamper
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Ian McCallum-Cook
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Siva P. Adusumilli
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10192779
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Patent Primary Examiner
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Walter H Swanson
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