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US Patent 10312131 Semiconductor devices with back surface isolation

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Patent Citations Received
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US Patent 12087764 Device integration schemes leveraging a bulk semiconductor substrate having a <111> crystal orientation
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US Patent 12002878 Implanted isolation for device integration on a common substrate
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Patent abstract

Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.

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https://pdfpiw.uspto.gov/.piw?Docid=1031213100
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US Patent 11569374 Implanted isolation for device integration on a common substrate
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Infobox
Is a
Patent
Patent
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
103121310
Date of Patent
June 4, 2019
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Patent Application Number
154346110
Date Filed
February 16, 2017
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=103121310
Patent Primary Examiner
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Jay C Chang
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https://pdfpiw.uspto.gov/.piw?Docid=10312131
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 US Patent 10312131 Semiconductor devices with back surface isolation

Infobox
Is a
Patent
Patent
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
10312131
Date of patent
June 4, 2019
Patent application number
15434611
Date Filed
February 16, 2017
Patent primary examiner
‌
Jay C Chang

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