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US Patent 10312346 Vertical transistor with variable gate length
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Patent
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Date Filed
October 19, 2016
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Date of Patent
June 4, 2019
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Patent Application Number
15297418
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Patent Citations Received
US Patent 10818556 Method for forming a semiconductor structure
US Patent 11316031 Method of forming fin forced stack inverter
Patent Inventor Names
Bassem M. Hamieh
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Stuart A. Sieg
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Junli Wang
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Brent A. Anderson
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10312346
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Patent Primary Examiner
Cheung Lee
0
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