Patent attributes
A three-dimensional (3D) semiconductor device is provided, comprising a substrate having an array area and a staircase area adjacent to the array area, wherein the staircase area comprises N steps, N is an integer one or greater; a stack having multi-layers on the substrate, and the multi-layers comprising active layers alternating with insulating layers on the substrate, the stack comprising sub-stacks formed on the substrate and the sub-stacks disposed in relation to the N steps of the staircase area to form respective contact regions, wherein an uppermost active layer of each of the sub-stacks in the respective contact regions comprises a silicide layer; and multilayered connectors, formed in the respective contact regions and extending downwardly to electrically connect the silicide layer in each of the sub-stacks.
