US Patent 10360982 Semiconductor memory device

The present embodiment discloses a semiconductor memory device which includes a memory cell array, a signal pad, a first voltage pad, a first regulation circuit and a first operation circuit. The signal pad supplies an output signal associated with the memory cell array. The first voltage pad receives a first voltage. The first regulation circuit regulates a signal output from the signal pad. The first operation circuit operates the first regulation circuit. The first regulation circuit and the first operation circuit are provided between the signal pad and the first voltage pad.