Patent attributes
A cell-aware defect characterization method includes partitioning a multibit cell netlist file into multiple single-bit partition netlist files, and then generating a cell-aware test model for each partition netlist file. Partitioning is performed such that each partition netlist file includes a corresponding flip-flop along with input, output and control pins that are operably coupled to the input, output and control terminals of the corresponding flip-flop, and all active, passive and parasitic circuit elements that are coupled in the signal paths extending between the corresponding flip-flop and the input/output/control pins. Shared resources (e.g., clock or scan select pins and associated signal lines) that are utilized by two or more flip-flops are included in each associated partition. The partitioning process is performed using either a structural back-tracing approach or a logic simulation approach.
