Patent attributes
A configuration bit for a switching block routing array comprising a non-volatile memory cell is provided. By way of example, the configuration bit and switching block routing array can be utilized for a field programmable gate array, or other suitable circuit(s), integrated circuit(s), application specific integrated circuit(s), electronic device or the like. The configuration bit can comprise a switch that selectively connects or disconnects a node of the switching block routing array. A non-volatile memory cell connected to the switch can be utilized to activate or deactivate the switch. In one or more embodiments, the non-volatile memory cell can comprise a volatile resistance switching device connected in serial to a gate node of the switch, configured to trap charge at the gate node to activate the switch, or release the charge at the gate node to deactivate the switch.