Patent attributes
A family of current mode analog to digital converters, or TiADC, utilizing methods, circuits, and apparatuses, are disclosed with the following benefits: (1) There are normal and random non-systematic mismatch between devices in silicon manufacturing, that introduce non-linearity in current mode analog to digital converter's, or iADC, reference network. The iADC's linearity is improved by utilizing a thermometer current mode signal conditioning method, SCM. Successive applications of the SCM effectuates a segmented current reference network to function like a thermometer network, which operates based on the function of summation. Having a TiADC with a thermometer reference network, where current segments are summed or accumulated incrementally, would inherently reduce the impact of statistical distribution of component's random mismatch on the iADC's non-linearity. Accordingly, linearity of TiADC can be improved by the square root of the sum of the square of mismatch errors of the number of segmented current references in the thermometer network. (2) speed is improved by operating the TiADC in current mode, which is inherently faster. (3) voltage swings in current mode are small, which enables the iADC to operate at lower power supply voltages. (4) The TiADC can operate in subthreshold and at very low currents, which lower powers consumption. (5) the TiADC is asynchronous. Being clock free, TiADC has lower dynamic power consumption with reduces digital system noise. (6) the signal conditioning method or SCM utilized in TiADC provides concurrent functions of analog differencing and digital comparison. This trait enhances the dynamic response of iADC, wherein the digital output throughput accuracy degrades gradually and not abruptly as a function of increasing frequency of iADC's input signal. (7) No passive devices, such as capacitors or resistors, are required for the TiADC. (8) TiADC can be fabricated on low cost mainstream standard digital CMOS processes.
