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Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Nitin Kumar Chhabra0
Date of Patent
March 10, 2020
0Patent Application Number
158695420
Date Filed
January 12, 2018
0Patent Citations Received
Patent Primary Examiner
Patent abstract
Systems and methods for die resistance-capacitance (RC) extraction and validation are described. In one embodiment, the method includes generating a chip power model (CPM) based at least in part on single domain excitation to determine a die capacitance; and performing loop-based static IR drop analysis to determine a die resistance for each power domain of a die. In some cases, the generating of the chip power model (CPM) includes generating a separate CPM for each power domain of the die.
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