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US Patent 10763177 I/O device for gate-all-around transistors

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Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Date of Patent

September 1, 2020

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Patent Application Number

162906060

Date Filed

March 1, 2019

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Patent Citations

US Patent 10403738 Techniques for improved spacer in nanosheet device

US Patent 10553679 Formation of self-limited inner spacer for gate-all-around nanosheet FET

US Patent 10446664 Inner spacer formation and contact resistance reduction in nanosheet transistors

US Patent 10615258 Nanosheet semiconductor structure with inner spacer formed by oxidation

US Patent 10243060 Uniform low-k inner spacer module in gate-all-around (GAA) transistors

US Patent 10332962 Nanosheet semiconductor structure with inner spacer formed by oxidation

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Patent Citations Received

US Patent 12062695 Transistor gate structures and methods of forming the same

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US Patent 11410889 Semiconductor device and manufacturing method thereof

US Patent 11411124 Semiconductor devices

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US Patent 10923602 Semiconductor devices

US Patent 11056396 Gate-all-around devices having gate dielectric layers of varying thicknesses and method of forming the same

US Patent 11637180 Transistor gate structures and methods of forming the same

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US Patent 11302692 Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same

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