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US Patent 10826502 Field programmable gate array with external phase-locked loop
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Patent
Date Filed
November 1, 2019
Date of Patent
November 3, 2020
Patent Application Number
16672076
Patent Citations
US Patent 10411720 Efficient and dependable clock synchronization in hardware
US Patent 10169814 High speed processing of financial information using FPGA devices
US Patent 10037568 Method and apparatus for managing orders in financial markets
Patent Citations Received
US Patent 12113539 Field programmable gate array with external phase-locked loop
0
US Patent 11522549 Time-to-digital converter and signal alignment method using the same
US Patent 12021538 Clock frequency limiter
0
US Patent 12107587 Field programmable gate array with internal phase-locked loop
0
US Patent 11509410 Method for a slave device for calibrating its output timing, method for a master device for enabling a slave device to calibrate its output timing, master device and slave device
US Patent 11018678 Field programmable gate array with internal phase-locked loop
US Patent 11594296 Memory controller physical interface with differential loopback testing
US Patent 11329655 Field programmable gate array with internal phase-locked loop
US Patent 11342903 Bandpass filter
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10826502
Patent Primary Examiner
Diana J. Cheng
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