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US Patent 10833003 Integrated circuits with backside power rails

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
May 31, 2019
Date of Patent
November 10, 2020
Patent Application Number
16427831
Patent Citations Received
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US Patent 11915984 Forming a wrap-around contact to connect a source or drain epitaxial growth of a complimentary field effect transistor (CFET) to a buried power rail (BPR) of the CFET
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US Patent 11804436 Self-aligned buried power rail cap for semiconductor devices
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US Patent 12136655 Backside electrical contacts to buried power rails
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US Patent 12080608 Self-limiting manufacturing techniques to prevent electrical shorts in a complementary field effect transistor (CFET)
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US Patent 11322401 Reverse contact and silicide process for three-dimensional semiconductor devices
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10833003
Patent Primary Examiner
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Peniel M Gumedzoe

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