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US Patent 10847523 Stacked memory and ASIC device
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Patent
Date Filed
July 3, 2019
Date of Patent
November 24, 2020
Patent Application Number
16503375
Patent Citations
US Patent 10211218 U-shaped vertical thin-channel memory
Patent Citations Received
US Patent 11861284 Conductor scheme selection and track planning for mixed-diagonal-manhattan routing
0
US Patent 11637110 Semiconductor device
0
US Patent 11282568 Semiconductor storage device having a memory unit bonded to a circuit unit and connected to each other by a plurality of bonding metals
US Patent 11515319 Semiconductor memory structure and manufacturing method thereof
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10847523
Patent Primary Examiner
Niki H Nguyen
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